IC Manage IP Central IP Central ranked #1 DAC 2011 must-see technology by John Cooley-Deepchip IC Manage Global Design Platform (GDP) includes IP Central, an open platform for maximizing IP reuse. Design and verification teams can use IP Central to rapidly publish and integrate IP into existing design flows, and to trace bug dependencies. Internal and third party IP can be imported or linked to IP Central from multiple commercial and open source design management systems, as well as internal revision control systems. 1.   Create & Publish IP via a check-list driven flow with encapsulated IP and property data, such as design data, bugs, assertions, constraints, electrical and simulation parameters, and documentation. An IP can be marked as completed or verified, based on a set of rules or metrics. Quality or verification metrics can be imported or linked from third party tools. 2.   Import or Link IP data from multiple commercial and open source design management systems and internal databases and file systems to create a central view of IP assets. 3.   Integrate IP data by automatically mapping directory based data into structured format. 4.   Search and Select IP by fully configurable, dynamic specifications. For example, find objects that are of type PLL, 0.13 micron, 2100 MHz, Verilog, GDSII, LEF, DRC and LVS clean. IP Central can also link to external IP catalogs. 5.   Manage IP Bugs by identifying the bugs, tracing bug dependencies and propagating fixes. 6.   Track IP via incremental capabilities, as compared to static tar ball or stagnant bill of materials models. IP Central's visual analytics allow for easier tracking of IP usage and interdependencies.